MUXPLUS2说我程序中conv_logic_vector未被定义,但是我已经加了IEEE.STD_LOGIC_ARITH.ALL库了

MUXPLUS2说我程序中conv_logic_vector未被定义,但是我已经加了IEEE.STD_LOGIC_ARITH.ALL库了
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY sin IS
PORT(
CLK,CLR:IN STD_LOGIC;
Q:OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END sin;
ARCHITECTURE rt1 OF sin IS
BEGIN
PROCESS(CLK,CLR)
VARIABLE TMP:INTEGER RANGE 0 TO 63;
BEGIN
IF CLR='1'THEN
Q