Error (10327):VHDL error at xd.vhd(17):can't determine definition of operator ""+"" -- found 0 pos
问题描述：
Error (10327):VHDL error at xd.vhd(17):can't determine definition of operator ""+"" -- found 0 pos
初学VHDL~
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY xd IS
PORT (sel :IN std_logic;
d0,d1 :IN std_logic;
led :OUT std_logic);
END ENTITY xd;
ARCHITECTURE abc OF xd IS
signal num0 :std_logic_VECTOR(7 DOWNTO 0);
signal num :std_logic_VECTOR(7 DOWNTO 0);
BEGIN
num0
答
第二行添加
USE IEEE.STD_LOGIC_UNSIGNED.ALL;