用VHDL设计四个开关控制一盏灯的逻辑电路,要求改变任意开关的状态能够引起灯亮灭状态的改变.（即任一开

SIGNAL sw1,sw1_r :STD_LOGIC := '0';
SIGNAL sw2,sw2_r :STD_LOGIC := '0';
SIGNAL sw3,sw3_r :STD_LOGIC := '0';
SIGNAL sw4,sw4_r :STD_LOGIC := '0';
SIGNAL status :STD_LOGIC := '0';
sw_proc:PROCESS(clk)
BEGIN
IF RISING_EDGE(clk) THEN
IF rst = '1' THEN
sw1_r